[Bug]: [Bug/WIP] Radxa E24C (RK3528) completely hangs at srcu_init during early boot

[Xavier1989]

What happened?

Describe the bug
When building Armbian for the radxa-e24c (currently in WIP) using the vendor branch (Linux 6.1.115), the kernel completely freezes during early boot. The last serial output is always at srcu_init. There is no kernel panic, no reboot, and adding initcall_debug yields absolutely no output. The CPU seems to encounter a hard lockup or synchronous abort before initializing the timers.

Logs.txt

How to reproduce?

To Reproduce

Build command: ./compile.sh BOARD=radxa-e24c BRANCH=vendor RELEASE=bookworm BUILD_MINIMAL=yes BUILD_DESKTOP=no EXPERT=yes

Flash the generated image to eMMC.

Boot the Radxa E24C board while monitoring UART0 (earlycon=uart8250,mmio32,0xff9f0000).

Expected behavior
The kernel should proceed past RCU initialization, start the arch_timer, and continue to mount the rootfs.

Actual behavior
The boot process stops dead here:

Plaintext
[ 0.000000] rcu: Hierarchical RCU implementation.
[ 0.000000] rcu: RCU event tracing is enabled.
...
[ 0.000000] GIC: Using split EOI/Deactivate mode
[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
(Hangs forever)

Investigation & Hardware Suspects
To isolate the issue, I flashed the official Radxa ROCK 2F image (also RK3528, Vendor 6.1.115) onto my E24C board. Surprisingly, the 2F image successfully passes srcu_init, initializes the timers, and reaches the initramfs shell.

By comparing the working 2F dmesg and .config against the Armbian build, I strongly suspect the lockup is caused by one of the following low-level hardware/resource conflicts in the current wip device tree or defconfig:

SPI vs. eMMC Pinmux Conflict (Highly Suspected): According to the E24C hardware documentation, the SPI Flash and eMMC share multiplexed pins and are mutually exclusive. If the rk3528-radxa-e24c.dts (or the included -spi.dts) enables both &sfc and &sdhci simultaneously, it likely causes a fatal bus deadlock during early pinmux initialization.

FIQ Debugger Interrupt Hijacking: The Rockchip vendor config often enables CONFIG_FIQ_DEBUGGER. If it binds to UART0 while earlycon is using it, the GIC initialization might trigger an unhandled FIQ exception, freezing the CPU silently.

DMC / ATF (Trust) Crash: The kernel might be crashing the ATF (BL31 v1.17) when attempting to initialize DRAM frequency scaling (&dmc).

Questions for the community

Has anyone successfully booted the radxa-e24c.wip target on the vendor 6.1 branch recently?

Are there any existing patches to forcefully disable &sfc and &dmc for the E24C target to prevent these early initialization deadlocks?

Any insights or suggestions for patching the DTS/config for this WIP board would be greatly appreciated!

Branch

main (main development branch)

On which host OS are you running the build script and observing this problem?

Ubuntu 22.04 Jammy

Are you building on Windows WSL2?

• Yes, my Ubuntu/Debian/OtherOS is running on WSL2

Relevant log URL

No response

Code of Conduct

• I agree to follow this project's Code of Conduct

[github-actions]

Hey @Xavier1989! 👋

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[github-actions]

Jira ticket: AR-2833

[rpardini]

Hey @Xavier1989 -- I've only booted it into vendor kernel once (but, it did "boot"/work). Vendor is completely useless for me so I immediately moved on to mainline since then, so I can't really help.